Address management system
US4163280A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1977 |
| Grant date | Jul 31, 1979 |
| Priority date | — |
| Expiry date | Jun 17, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address management system includes a central processing unit (CPU) and an address management unit arranged between a direct memory device (DMA) and a main memory unit to control memory access from the CPU and DMA. Segment registers for address expansion are provided in the CPU and DMA, respectively. The address management unit includes a conversion table for converting logical address data and segment data and segment data from the CPU and DMA into a corresponding physical address data, and the conversion table includes a bit position for detecting an address error and a control bit for selecting a memory access to a local memory or a shared memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.