Current and voltage autozeroing integrator
US4163947A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 1977 |
| Grant date | Aug 7, 1979 |
| Priority date | — |
| Expiry date | Sep 23, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/1865
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An autozeroing integrating circuit which compensates for input offset voltages and input current to the integrator differential amplifier. During an integrate period, an input signal is integrated in the conventional manner, and a voltage is accumulated on the integrating capacitor. The integrator may be reset to discharge the integrator capacitor in preparation for a new integration. During reset mode, the integrator automatically corrects for input offset voltage errors in the amplifier by storing the offset voltage. During an autozero mode, a charge is stored on a capacitor which provides via a buffer amplifier a current which compensates for the current flowing into the input of the integrator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.