Digital recognition circuits
US4166271A · kind A · utility
8Cited by
4References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1977 |
| Grant date | Aug 28, 1979 |
| Priority date | — |
| Expiry date | Dec 23, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/56
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit for monitoring digital data in the form of words comprising a plurality of digits comprises a shift register through which the digital data is fed and one or more memory devices arranged to compare the data in the shift register with predetermined data stored in the memory device or devices. The memory device or devices produce a numerical count of the number of digits either which are correct or which are incorrect and that number is compared by a comparison circuit with a reference value in order to control dumping or further processing of the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.