Patent · US Expired

Register building block with series connected cells to save dissipation loss

US4168540A · kind A · utility

2Cited by
2References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 28, 1978
Grant dateSep 18, 1979
Priority date
Expiry dateAug 28, 1998

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/415
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A register building block is disclosed comprising binary memory cells of cross-coupled double emitter transistors which are fed from a source of constant current and addressed by raising the collector potential. Given a predetermined operating voltage, two memory cells are connected in series to save dissipation loss in each constant current circuit. A switch controlled by one bit of the address is used to select one memory cell from the addressed pair of memory cells. The circuit arrangement disclosed is utilized in highly integrated building blocks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.