Method for forming dense dry etched multi-level metallurgy with non-overlapped vias
US4172004A · kind A · utility
32Cited by
11References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1977 |
| Grant date | Oct 23, 1979 |
| Priority date | — |
| Expiry date | Oct 20, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A double level metal interconnection structure and process for making same are disclosed, wherein an etch-stop layer is formed on the first metal layer to prevent over-etching thereof when forming the second level metal line in a via hole in an insulating layer thereover, by means of reactive plasma etching. The etch-stop layer is composed of chromium and the reactive plasma etching is carried out with a halocarbon gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.