Booster circuit for electronic timepiece
US4173862A · kind A · utility
3Cited by
5References
4Claims
0Family size
Inventors
Key dates
| Filing date | May 25, 1977 |
| Grant date | Nov 13, 1979 |
| Priority date | — |
| Expiry date | May 25, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04G9/007
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A booster circuit for an electronic timepiece having a power supply and a display device adapted to be driven in a matrix driving mode, which comprises a Cockcroft circuit connected to one terminal of the power supply to provide a plurality of boosted output voltages to the display device and voltage compensating means connected to the other terminal of the power supply to compensate for voltage drops caused by said Cockcroft circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.