Method and system for in situ control of material removal processes
US4179622A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 25, 1978 |
| Grant date | Dec 18, 1979 |
| Priority date | — |
| Expiry date | Apr 25, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0274
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
In practice, the development time for a photoresist covered semiconductor wafer exposed by a given mask configuration is established experimentally. It is obvious that this time is only adequate if the other parameters do not change. According to the subject invention the mask is provided with an optical grid. The grid pattern, together with the pattern of the integrated circuit, is transferred by exposure to the photoresist layer covering the semiconductor wafer. During the development process, a light ray is directed onto the area of the wafer which was exposed to the grid pattern and the intensity of the light diffracted in the direction of the 2nd diffraction order is monitored by a light sensor. The slits of the grid may have the same width as the smallest lines of the exposed pattern. In this case, the intensity minimum of the 2nd diffraction order indicates the end of the development process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.