Biasing and drive circuitry for quasi-linear transistor amplifiers
US4180781A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 5, 1978 |
| Grant date | Dec 25, 1979 |
| Priority date | — |
| Expiry date | Jun 5, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/26
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output transistor in common-emitter amplifier configuration is thermally coupled to means for generating a temperature-compensated component of bias potential. This bias potential is indirectly applied to the base electrode of the output transistor to provide for temperature-stabilized idling current flow in its collector-to-emitter path. More particularly, the bias potential is applied to the non-inverting terminal of a high-gain differential-input amplifier having its output terminal direct coupled to the base of the transistor and direct coupled to its inverting input terminal for regulating the quiescent potential at its output terminal to equal the bias potential. The differential-input amplifier has an input signal applied to one of its input terminals. In response to signal excursions in one sense, the differential-input amplifier drives the output transistor into increased conduction. Arrangements of two output transistors and respective differential-input amplifiers for push-pull operation are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.