Patent · US Expired

Double precision residue combiners/coders

US4187549A · kind A · utility

9Cited by
2References
3Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 5, 1978
Grant dateFeb 5, 1980
Priority date
Expiry dateSep 5, 1998

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F7/727
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Apparatus, useful in signal processing, and which can be used for modulo (2.sup.n -1) addition, subtraction, coding, and decoding, has a plurality of 2n input means: n means for receiving a signal I.sub.0, I.sub.1, . . . , I.sub.n-1, and another n means for receiving a signal J.sub.0, J.sub.1, . . ., J.sub.n-1. A pluraity n of means, connected to the n I signal input means, may switch each input means so that it is connected alternately into one of two connecting points, a first and a second connecting point. A plurality n of means is connected to the n first connecting points, for inverting the polarity of a signal received at its input, the output of the inverting means being connected to its associated second connecting point. A plurality n of three input adding means, has one input connected to the output of the inverting means, and another being connected to an associated means for receiving a J signal, the means adding the two inputs. The plurality n of adding means are circularly connected to each other, by a third input in the manner of a full adder. Means, having its n inputs connected to the n adding means, add the n-inputs in an AND manner. A second means, whose input is…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.