Analog-to-digital converter system
US4195235A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 1977 |
| Grant date | Mar 25, 1980 |
| Priority date | — |
| Expiry date | Nov 14, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/52
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog subsystem is disclosed which can be included in a single monolithic, integrated circuit chip and which is for use with a digital subsystem to form a dual ramp analog-to-digital converter. A current steering network included in the analog subsystem is connected to a reference current source and to an input voltage-to-current converter. An integrator is connected to the output of the current steering network, and a comparator is connected to the output of the integrator. The current steering network selectively conducts the current from the converter to charge the integrator for a predetermined period of time, which is terminated by the application of a signal to the current steering network by the digital subsystem. The network then conducts the current from the constant reference current source to discharge the integrator which ultimately triggers the comparator. A comparator output signal then terminates the count of a counter in the digital subsystem to provide a reading proportional to the magnitude of the analog voltage being measured. The analog subsystem further includes a ramp offset current source which increases system noise immunity and improves the linearity of…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.