Counter for cross-tie wall memory system
US4198686A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 1979 |
| Grant date | Apr 15, 1980 |
| Priority date | — |
| Expiry date | Feb 23, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/766
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of and an apparatus for counting is disclosed. The counter includes a generator of cross-tie, Bloch-line pairs and a shift register of N stages or memory cells along which the cross-tie, Bloch-line pairs are propagated or replicated into a detector. The method includes coupling a series of bipolar push-nucleate replicate signals, each one of which produces a cross-tie, Bloch-line pair in the adjacent downstream memory cell along the shift register. When the shift register is filled, a cross-tie will appear in the detector. This provides an output signal indicating that the N memory cells have been filled by the N replicate signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.