Method for producing an electrical thin layer circuit

US4200502A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Wolf-Dieter Munz · Somborn, DE
• Siegfried Bock · Kirchseeon, DE
• Hans W. Potzlberger · Hersbruck, DE

Key dates

• Filing date: Mar 12, 1979
• Grant date: Apr 29, 1980
• Expiry date: Mar 12, 1999

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/49156
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method is disclosed for producing an electric thin layer circuit comprising at least one capacitor and a conductor path and/or a resistor. The number of masks required for the production of such a thin layer circuit is reduced. First and second layers of tantalum-aluminum alloy where the second layer has a tantalum share lower than the first, are applied on an insulating base. In a first masking and etching technique, areas of the first and second layers are etched off outside the circuit elements. At least the second layer is anodically oxidized and the anodically oxidized surface is covered with a silicon dioxide layer so as to form a two layer dielectric for the capacitor. In a second masking and etching technique, not-required areas of the silicon dioxide layer external to the capacitor are removed. By utilizing the silicon dioxide layer remaining as an etching mask, the not-required areas of the tantalum-aluminum oxide layer and the second tantalum-aluminum layer external to the capacitor are removed. In a third etching and masking technique, a conductive surface layer is applied over the silicon dioxide layer at the capacitor element to form a two-layer dielectric capacitor…