Regulated deflection circuit
US4209732A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 1978 |
| Grant date | Jun 24, 1980 |
| Priority date | — |
| Expiry date | Nov 30, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N3/1856
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
To regulate the DC input voltage to a deflection circuit, a saturable reactor winding is series coupled with an unregulated DC voltage, a diode, a flyback transformer winding and an input terminal of the deflection circuit. During retrace, the diode is forward biased and conducts input current to the input terminal. During trace, the opposite polarity trace voltage commutates off the diode and decouples the input terminal from the unregulated DC voltage at a varied instant within trace in accordance with the impedance of the saturable reactor winding. The average DC voltage across the diode fluctuates with diode conduction angle variations and maintains a regulated input voltage at the input terminal despite fluctuations in the unregulated DC voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.