Solid state power outage recording circuit
US4210937A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 8, 1978 |
| Grant date | Jul 1, 1980 |
| Priority date | — |
| Expiry date | May 8, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R21/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A power outage indicating circuit for recording apparatus of the type which records data pulses along with a time reference on magnetic tape includes a silicon controlled rectifier which is normally maintained conducting to maintain a timing capacitor charged as long as power is supplied to the power outage circuit. Upon loss of power, the SCR device is rendered nonconducting permitting the timing capacitor to discharge. After power has been restored, the SCR device is triggered into conduction in response to the closing of a cam operated outage switch and supplies charging current to the timing capacitor. While the capacitor is charging, the charging current enables a time track head driver circuit to effect reversal of the direction of current flow through the winding of a time track recording head, causing an outage pulse to be recorded on the magnetic tape. A delay circuit prevents the power outage circuit from responding to line transients.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.