Programmer for implanted pacer
US4211235A · kind A · utility
31Cited by
6References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 1978 |
| Grant date | Jul 8, 1980 |
| Priority date | — |
| Expiry date | Jun 19, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG08C19/22
- WIPO fieldMedical technology
- WIPO sectorInstruments
Abstract
A plurality of programming bits are placed into a parallel in-serially out register. When the programmer is activated, a monostable resets a counter, and energizes an oscillator which clocks the counter. Three subintervals from the counter are utilized for pulse width modulation of the programming signals. Once for each bit, the output is energized and begins transmitting pulses at the lowest subinterval rate. Depending upon the logic state of each bit, the transmission pulse is terminated either at the second or the third subinterval time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.