Patent · US Expired

Digital filters with control of limit cycles

US4213187A · kind A · utility

7Cited by
4References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 14, 1978
Grant dateJul 15, 1980
Priority date
Expiry dateDec 14, 1998

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03H2017/0466
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Limit cycles are eliminated in digital filters driven by zero, d.c. and period 2 inputs, by adjusting the filter output in response to the state variables present within the filter. The filter includes a quantizer (201) adapted to provide a fixed length output word p in response to an input y, where p<y<p+k and k is the quantizer step size. The filter is further arranged to form the products a.multidot.X.sub.n and b.multidot.X.sub.n, where a and b are multiplier coefficients and X.sub.n and X.sub.n-1, the state variables, are once and twice delayed versions of the filter output X.sub.n+1, and to combine the aforesaid products and the filter input U.sub.n to yield the value y. In accordance with the invention, the quantizer output is adjusted to p+k, if PA1 X.sub.n-1 >p+k or PA1 X.sub.n-1 =p and .vertline.X.sub.n +Sgn(a)X.sub.n-1 .vertline..gtoreq.T or PA1 X.sub.n-1 =p+k and .vertline.X.sub.n +Sgn(a)S.sub.n-1 .vertline.<T, where T is a fixed threshold value and Sgn(a) is the sign of the multiplier coefficient a.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.