Low-resistance, fine-line semiconductor device and the method for its manufacture
US4213840A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1978 |
| Grant date | Jul 22, 1980 |
| Priority date | — |
| Expiry date | Nov 13, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating gate electrodes on microwave field effect transistors is described. A first layer of photo-resist is deposited and photolithographically defined on top of a semiconductor material with openings in the photoresist, corresponding to the gate electrode. In one embodiment, when drain and source electrodes have been previously formed, additional openings in the first layer of photoresist are defined that approximately overlay the drain and source electrodes. A metal layer is then deposited on top of this structure. A second layer of photoresist is then deposited and photolithographically defined on top of the first metal layer, with larger openings which overlay the openings in the first layer of photoresist. The thickness of the gate electrode, and in one embodiment, the sections overlaying the drain and source electrodes, is then increased by plating gold into the openings in the second layer of photoresist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.