Digital to analog converter using multiple emitter transistors
US4214235A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 21, 1979 |
| Grant date | Jul 22, 1980 |
| Priority date | — |
| Expiry date | May 21, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention is a circuit for the generation of 2.sup.n -step digital signals from n-binary signals which are respectively supplied to the input of emitter followers which are connected with a first multi-emitter transistor, whereas inverse binary signals are respectively supplied to the input of another set of emitter followers which are connected to a second multi-emitter transistor. The emitter connections of both multi-emitter transistors are also respectively connected through stepped current sources to an operating potential. The base connections of the multi-emitter transistors are connected to a reference potential through a common resistor. The collector connections of the multi-emitter transistors are connected to load resistors and serve as output connections. The circuit is particularly suited as a binary multi-stage converter for employment in PCM systems of a very high bit rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.