Circuit arrangement for the digital correction of time base errors of a television signal using variable addressing of a memory
US4215376A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 1978 |
| Grant date | Jul 29, 1980 |
| Priority date | — |
| Expiry date | Jan 30, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/956
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a circuit arrangement for the digital correction of time base errors in a television signal this signal is converted into digital television signals with a certain clock frequency in an analog/digital converter, which signals are consecutively written into the individual addresses of a random access memory (RAM) with the same clock frequency and in the meantime are read from specific addresses of the memory with the same frequency. Which addresses are read depends on the magnitude and sign of the time base error, which is determined in a detection circuit from a comparison signal of the television signal and is converted into digital time base error signals which are quantized with a given time interval, which error signals are applied to an address signal which depending on the number of time intervals, which are defined by the clock frequency, in the time base error signals relative to the number of addresses of the memory controls the selection of the addresses to be read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.