High speed integrated switching circuit for analog signals
US4228367A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 7, 1978 |
| Grant date | Oct 14, 1980 |
| Priority date | — |
| Expiry date | Aug 7, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2017/6875
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high current capacity junction field effect transistor, or JFET, is provided with certain special circuitry so that it may be rapidly switched on and off, and is protected against fault currents. The gate electrode of the large switch JFET is controlled by a circuit including four additional JFET's of somewhat smaller size, arranged in two pairs, with a transistor interconnecting one of the pairs of JFET's. The first pair of JFET's permits the rapid charging of the sizable gate capacitance of the switch JFET as it is being turned off, with the second series connected pair of JFET's of smaller current carrying capacity serving to continue the current flow, and maintain the gate electrode of the switch JFET at the desired "pinch-off" voltage, When the switch JFET is being turned on, the transistor is initially energized by the differing current capacities of the two transistors making up the second, current limiting air of JFET's mentioned above, to rapidly discharge the large switch JFET capacitance. Fault protection for the switching circuit is achieved by various techniques including the use of a current limiting JFET, and other components placed to block heavy fault currents wh…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.