Digital tuning FM stereophonic receiver including phase locked loop synthesizer
US4228542A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 1978 |
| Grant date | Oct 14, 1980 |
| Priority date | — |
| Expiry date | Oct 16, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J5/0272
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A digital tuning FM stereophonic receiver of the type including a phase locked loop synthesizer. A digital code generating circuit is provided for generating a digital code which consists of several bits to be applied to a programmable frequency divider inserted in the phase locked loop. At least one auxiliary bit is provided together with the bits of the digital code. The information of the auxiliary bit is used to input and hold the digital code to be applied thereto. Muting operation of the FM stereophonic receiver is controlled in accordance with the information of the auxiliary bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.