Patent · US Expired

Treating multilayer printed wiring boards

US4230553A · kind A · utility

9Cited by
1References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 23, 1979
Grant dateOct 28, 1980
Priority date
Expiry dateApr 23, 1999

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49174
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

Multilayer printed wiring boards are conventionally laminated using epoxy adhesives. When the boards are drilled, a residual smear often remains within the drilled holes. This smear prevents proper through plating of the holes and the layers are left without some of the intended interconnections. In the past, the residual smear was removed by wet etching. A technique is described using plasma etching with the conductive surface layers of the drilled boards as the electrodes to generate the plasma. The plasma forms directly within the holes and effectively removes the smear. A dielectric material in contact or close proximity to the perimeter of each board provides uniformity of treatment over the panels.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.