Generating timing signals
US4231104A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 26, 1978 |
| Grant date | Oct 28, 1980 |
| Priority date | — |
| Expiry date | Apr 26, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/665
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal generator featuring, in one aspect, a clock, a programmable means for counting signals from the clock and providing outputs at predetermined counts, a delay means for providing a timing signal after a predetermined delay following each output, the delay means having a resolution higher than that of the clock, and a programmable means for repeatedly incrementing the delay for successive timing signals to provide a timing signal period not necessarily an integer multiple of the period of the clock. Preferred embodiments feature an additional delay means for delaying the output of the clock to provide sequences of clock signals having the same period as the clock output but shifted in time so that each timing signal occurs simultaneously with a clock signal, an additional counter connected to be clocked by the clock signals and reset by the timing signals, and means controlled through the counter for generating timing edges with a resolution equal to that of the delay means.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.