X Sense AMP memory
US4233675A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1979 |
| Grant date | Nov 11, 1980 |
| Priority date | — |
| Expiry date | Jun 8, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory is comprised of a semiconductor substrate having first and second spaced apart arrays of memory cells disposed thereon. A plurality of first pairs of bit lines couple to the cells of the first array, and a corresponding plurality of second pairs of bit lines couple to the cells of the second array. Disposed between each first pair and corresponding second pair of bit lines is one X sense amplifier. This amplifier includes a set node selectively coupled to one bit line of the first pair and to one bit line of the second pair, and a reset node selectively coupled to the opposite bit lines of the first and second pair for selectively sensing charge on the four bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.