Semiconductor apparatus
US4235011A · kind A · utility
21Cited by
8References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1979 |
| Grant date | Nov 25, 1980 |
| Priority date | — |
| Expiry date | Mar 28, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a field-effect transistor device is provided with the device resulting having a relatively substantial capability to withstand reverse bias voltages. The device can also be provided having a relatively low "on" condition resistance between the source and drain terminals thereof by virtue of a geometrical design choice.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.