High capacitance multilayer bus bar and method of manufacture thereof
US4236038A · kind A · utility
19Cited by
6References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 19, 1979 |
| Grant date | Nov 25, 1980 |
| Priority date | — |
| Expiry date | Jul 19, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A high capacitance bus bar is presented having at least two separated conductive plates between which a plurality of capacitive ceramic dielectric chips are positioned and adhered. The outer surfaces of the dielectric chips are metalized and have a roughened or coarse finish to provide contact between the dielectric chips and the conductive plates, thereby permitting use of nonconductive adhesive to bond the parts of the assembly together.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.