Microprocessor controlled display system
US4237543A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 1978 |
| Grant date | Dec 2, 1980 |
| Priority date | — |
| Expiry date | Sep 1, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/126
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display system for displaying information in response to an input video signal comprises a data control unit including a microprocessor and a microprogram memory for storing a program for the microprocessor, a refresh memory unit connected to the data control unit through an address bus and a data bus, and a video control unit for accessing display data stored in the refresh memory unit by a timing control unit to produce a video signal. The refresh memory unit comprises memories sectioned by byte, an I/O controller which receives a read/write control signal to indicate whether the access by the data control unit is read access or write access and an access memory specifying signal to indicate whether it is a one-byte memory access or a two-byte memory access to produce an I/O control signal, and a memory controller responsive to the I/O control signal to control data access to the two byte memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.