Data processing apparatus providing autoincrementing of memory pointer registers
US4240142A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1978 |
| Grant date | Dec 16, 1980 |
| Priority date | — |
| Expiry date | Dec 29, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/35
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Central Processing Unit (CPU) provides programmable autoincrementing of memory pointer registers. The CPU includes an op-code extension register (OER) to store a code specifying the autoincrementing status of each memory pointer register. Whether or not a particular memory pointer register containing the address of an operand used in the current operation is automatically incremented at the end of an instruction cycle to contain the address of an operand required for the next operation depends on the binary state of a particular bit position in the OER corresponding to the particular memory pointer register. The contents of the op-code extension register can be changed by means of an instruction for transferring a new code to OER.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.