Method of fabricating random access memory device
US4240845A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 1980 |
| Grant date | Dec 23, 1980 |
| Priority date | — |
| Expiry date | Feb 4, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic random access memory is fabricated on a monolithic chip of semiconductor material. The memory is formed of an array of memory cells controlled for reading and writing by word and bit lines which are selectively connected to the cells. Each cell is a single field effect transistor structure having improved electrical charge storage capability. The improved charge storage capability of each cell is provided by an electrical capacitance structure uniquely arranged and formed as an integral portion of the field effect transistor structure. The gate electrode of each field effect transistor structure is connected to a predetermined one of said word lines. The drain of each field effect transistor is connected to a predetermined one of said bit lines. The source of each field effect transistor structure is integrally connected to and forms a portion of the uniquely arranged electrical capacitance structure of the field effect transistor structure. The electrical capacitance or storage node structure of each cell has increased electrical charge storage capacity and may be considered as a single capacitor. The single (storage) capacitor of each cell is provided between the source…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.