Tagged pointer handling apparatus
US4241396A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1978 |
| Grant date | Dec 23, 1980 |
| Priority date | — |
| Expiry date | Oct 23, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Tagged pointer handling apparatus is provided for implementation in a computer system wherein a tag bit is provided for each word in main storage. This invention provides for the mixing of data and pointers within the same storage space, and provides a capability for checking and verifying the validity of the pointers without affecting the performance or operation of other instructions. Only the tag instructions can set the tag bits ON in main storage; all other instructions store data and set the corresponding tag bits OFF. Thus, if a pointer was modified inadvertently by one of these data handling instructions, the fact that the pointer is untagged is detected and the values in the pointer are treated as invalid when the pointer is used by the Load and Verify Tags instruction. Instructions to load, store, set, move, extract and insert tags are implemented by the tagged pointer handling apparatus. A Load and Verify Tags instruction checks the validity of the pointer and if valid, loads the pointer into a specified general purpose register. A Store and Set Tags instruction stores the value in a specified general purpose register into main storage and sets the associated tag bits ON…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.