Charge coupled semiconductor device storing 2-bit information
US4243897A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1978 |
| Grant date | Jan 6, 1981 |
| Priority date | — |
| Expiry date | Apr 28, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D44/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The single input gate electrode in a conventional CCD shift register is replaced by four spaced electrodes. The fourth electrode adjacent to the first transfer electrode has an area larger than that of the second electrode which always has a DC voltage applied thereto. Three driving pulses are applied in a predetermined sequence to the first, third and fourth electrodes while the two bit values of 2-bit information are written into the register and a charge is accumulated directly under the fourth input gate electrode at one of four levels as determined by the combination of the write bit values. Then the accumulated charge is stepwise transferred in the same manner as in conventional CCD shift registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.