Receiver circuit for an echo-sounding system
US4245332A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 12, 1979 |
| Grant date | Jan 13, 1981 |
| Priority date | — |
| Expiry date | Apr 12, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S7/527
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An echo-sounding receiver circuit comprising first and second receiver channels and an AND gate enabled by simultaneous outputs from both receiver channels is disclosed. The first receiver channel includes an echo stacking circuit, an echo selection circuit, and a tracking window circuit for establishing a measuring range or window whose timing is determined in part by detection of the first primary target echo in a sounding period and whose duration is established by the tracking window circuit. The second receiver channel includes a tracking threshold circuit and a second echo selection circuit for detecting the first echo that exceeds an amplitude determined by the amplitude of the preceding primary target echo. Upon detection of a primary echo by the second channel during the window established by the first channel, the AND gate supplies an output signal to a recording instrument or other utilization device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.