Pneumatic logic circuit
US4245673A · kind A · utility
134Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1979 |
| Grant date | Jan 20, 1981 |
| Priority date | — |
| Expiry date | Feb 26, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T137/87893
- WIPO fieldMechanical elements
- WIPO sectorMechanical engineering
Abstract
A sequencing logic circuit comprises a blocking means for preventing phase jumps caused by the untimely presence of a release signal. An inhibitor device is placed on one of the channels feeding a storage relay, placed upstream of said release signal, in such a manner as to prevent the transmission thereto of a pressure for placing it in logic state "1." This inhibitor device is actuated by the release signal and does not permit any communication between the latter and the channel controlled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.