High density static memory cell
US4246592A · kind A · utility
8Cited by
2References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 2, 1979 |
| Grant date | Jan 20, 1981 |
| Priority date | — |
| Expiry date | Jan 2, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory of the static type employs a pair of cross-coupled driver transistors which are formed by a method which results in field oxide over the source and drain regions of the MOS transistors. Access transistors are formed by a different method and have silicon gates self-aligned with their source and drain diffusions. The load devices are punch-through elements resembling short channel transistors without gates. These features permit a cell layout with a minimum of space used for the cross-coupling connections, and the polysilicon address line can cross over the ground line, producing a very small cell size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.