Ionization resistant MOS structure
US4247862A · kind A · utility
28Cited by
1References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 5, 1978 |
| Grant date | Jan 27, 1981 |
| Priority date | — |
| Expiry date | Jul 5, 1998 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/953
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure and method for preventing minority carriers caused by an alpha particle, or the like, from drifting into storage regions and causing a false data bit. In a high density MOS circuit, a single alpha particle including one originating within the substrate or circuit package can generate enough carriers to give a false data bit. A minority carrier reflective barrier is employed to prevent substantial numbers of minority carriers from drifting into the active layer. In the presently preferred embodiment, this barrier is formed by ion implanting the upper surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.