Semiconductor memory device
US4250569A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 1978 |
| Grant date | Feb 10, 1981 |
| Priority date | — |
| Expiry date | Nov 15, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/00
Abstract
Disclosed is a semiconductor memory device using semiconductor memory elements as memory cells. Each semiconductor memory element is provided with a semiconductor region having a particular conductivity type, a source region and a drain region both having opposite conductivity type and both being located adjacent to the semiconductor region, one on each side of the semiconductor region, so that the semiconductor region functions as a separator between the source region and the drain region, and a gate electrode which is provided over the surface of the semiconductor region on a dielectric insulation film. In the semiconductor memory device, information is written in the semiconductor memory element by injecting electric charges into the semiconductor region, and the written information is read by detecting a variation of the electrical conductance on the surface of the semiconductor region due to the injection of electric charges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.