Virtual addressing apparatus employing separate data paths for segment and offset portions of a virtual address and utilizing only the offset portion to calculate virtual address
US4251860A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1978 |
| Grant date | Feb 17, 1981 |
| Priority date | — |
| Expiry date | Oct 23, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Virtual addressing apparatus for implementing a large virtual address in a computer system having narrow data paths, ALU, and local storage register arrays without requiring multiple passes. The virtual addressing apparatus stores the segment portion of a virtual address in a segment register and the offset portion of the virtual address in an offset register. To form a new virtual address, a new offset value is obtained by adding the displacement value given by the instruction in the instruction buffer register to the offset value stored in the offset register. The segment portion of the virtual address does not participate in the arithmetic operation for forming the new virtual address. The segment and offset portions are concatenated to form the new virtual address which is then translated to a main store address. Overflow detection circuitry in the ALU detects if an overflow out of the offset occurs as a result of the ALU operation for obtaining the new offset value. If an overflow is detected during the calculation of the new offset value, translation of the virtual address is subsequently aborted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.