Data processing apparatus providing variable operand width operation
US4258419A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1978 |
| Grant date | Mar 24, 1981 |
| Priority date | — |
| Expiry date | Dec 29, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30189
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Central Processing Unit provides programmable variation of the operand width for processor operations. The operands are formed with one or more N-bit segments. The CPU includes an arithmetic logic unit (ALU) which is adapted to operate serially on one N-bit segment of the operand at a time beginning with the least significant segment and repeating the operation on the remaining segments according to their order of significance. The number of repetitions of an ALU operation is controlled by a code stored in an op-code extension register (OER). The code in the OER can be changed by means of an instruction for transferring a new code to OER.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.