Utilizing simultaneous masking and diffusion of peripheral substrate areas
US4265685A · kind A · utility
15Cited by
10References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 28, 1979 |
| Grant date | May 5, 1981 |
| Priority date | — |
| Expiry date | Nov 28, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention deals with a method of taking out a substrate electrode of a LOCOS-type silicon gate MOSIC device from the surface of the semiconductor substrate. According to the present invention, a masking layer for preventing the introduction of impurities is formed on the periphery of the semiconductor substrate simultaneously with the masking step for forming a resistor of polycrystalline silicon, the mask is removed after the impurities have been introduced, and a substrate electrode is formed on the exposed surface of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.