Circuit for recharging the output nodes of field effect transistor circuits
US4267465A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 1979 |
| Grant date | May 12, 1981 |
| Priority date | — |
| Expiry date | Jan 15, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A recharging circuit is provided to maintain a high potential for a longer time interval at the output node of a FET driver circuit. The recharging circuit consists of a first FET which is made periodically conductive via a capacitor and periodically recharges a capacitance at the output node. This capacitance is first charged by a strong pulse of the driver circuit. A second FET is provided to prevent a current flow through the first FET and thus the generation of a power dissipating current when the output potential of the driver circuit is low. The gate of the second FET is connected to a supply voltage. Thus, the second FET is conductive when a low potential exists at the output node, transferring that potential to the gate of the first FET which, in turn, does not become conductive since its gate to source voltage is less than its threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.