Patent · US Expired

Direct memory access control system with byte/word control of data bus

US4271466A · kind A · utility

38Cited by
22References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 21, 1978
Grant dateJun 2, 1981
Priority date
Expiry dateNov 21, 1998

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/28
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A direct memory access control (DMAC) system, in a data processing system, includes at least a central processing unit and a memory, the memory being capable of storing and providing data in any one of several predetermined formats. A plurality of input/output control ports, each connecting a respective input/output device to a common data bus, control data transfer in either direction between the device and the memory. A direct memory access control unit is connected to the common data bus for receiving an access request signal from any of the plurality of input/output control ports, and is connected to the memory for providing thereto, in response to the access request signal, instructions at least as to the size and desired format of the data transfer. A bus switching unit connects the common data bus to the memory, and is connected to the direct memory access control unit for receiving the instructions. The bus switching unit is responsive to the direct memory access control unit for interfacing the memory to the common data bus in such a manner as to cause the data transfer to be of the desired format.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.