Phase locked loop control system
US4272712A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 1979 |
| Grant date | Jun 9, 1981 |
| Priority date | — |
| Expiry date | Apr 10, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S388/912
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In the disclosed system, if the frequency of input signals exceeds a value suitable for a load, the input signals and output signals are stored and compared in a comparator while locking of a phase locked loop is delayed by a loop filter that allows the output of the VCO (voltage controlled oscillator) to increase or decrease only at rates slower than given rates. When the input signals end after the loop locks, the filter delay causes the VCO to keep producing signals which are passed until the comparator recognizes that the number of output signals equals the number of input signals. If the input signals end before the loop locks, a logic circuit causes the VCO frequency to keep rising until another comparator indicates that the number of output signals has reached one-half the input signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.