Semiconductor memory device
US4272832A · kind A · utility
38Cited by
2References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 23, 1979 |
| Grant date | Jun 9, 1981 |
| Priority date | — |
| Expiry date | May 23, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device comprises an input address buffer circuit and a memory cell circuit which are constructed of static logic circuits, an address decoder circuit which is constructed of a dynamic logic circuit, a detector circuit which detects a change in an input address signal, and a pulse generator circuit which is started operating by an output signal of the detector circuit and which provides a clock signal for the dynamic logic circuit. Owing to the detector circuit and the pulse generator circuit, the semiconductor memory device operates without the necessity for any external clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.