Substrate coupled floating gate memory cell
US4274012A · kind A · utility
69Cited by
3References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 24, 1979 |
| Grant date | Jun 16, 1981 |
| Priority date | — |
| Expiry date | Jan 24, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile semiconductor electrically-alterable, floating-gate memory methods and devices which utilize substrate coupling for self-regulated, tunnel-current-shaping to provide improved device characteristics. The substrate coupling also facilitates the cell interconnection to other circuit elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.