Synchronizing mechanism for page replacement control
US4277826A · kind A · utility
Inventors
Key dates
| Filing date | Oct 23, 1978 |
| Grant date | Jul 7, 1981 |
| Priority date | — |
| Expiry date | Oct 23, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus provides synchronization for page replacement control in a paged, virtual memory environment in which either the CPU or the I/O devices may pin and unpin pages to control their replacement by the paging supervisor. Pinning and unpinning of pages by the I/O devices occurs independently of pinning and unpinning performed by the CPU. Synchronization is achieved by means of a virtual address translation mechanism which is common to the CPU and the I/O devices. The virtual address translation mechanism includes a primary directory having entries for each page in main storage, with each entry containing a field in which the pinning and unpinning operations by the CPU and the I/O devices are registered. In particular, this field is a counter which is incremented when a page is pinned by either the CPU or an I/O device and decremented when a page is unpinned. Each page directory entry also includes a field for indicating that references to the page corresponding to a given page directory entry are invalid. When it is determined that a particular page is no longer in use and is eligible for replacement, the page directory entry is set to indicate that further references to the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.