Fabrication of a nonvolatile memory array device
US4279069A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 1979 |
| Grant date | Jul 21, 1981 |
| Priority date | — |
| Expiry date | Feb 21, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/906
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is shown and described a memory array using MNOS/MOS transistors. The memory devices are nonvolatile, metal-nitride-oxide-semiconductor (MNOS) variable threshold voltage transistors and the metal-oxide semiconductor (MOS) input-output devices exhibit fixed threshold voltages. The MOS devices are fabricated first and the MNOS memory devices are fabricated thereafter. This memory gate last (MGL) arrangement eliminates the need for high temperature process steps after the formation of the MNOS device gate dielectric in the array devices. This operation results in an MNOS/MOS memory array which exhibits excellent ionizing radiation hardness characteristics as well as memory properties which are improved over present radiation hardened MNOS/MOS arrays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.