Metastable detector
US4282489A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 14, 1979 |
| Grant date | Aug 4, 1981 |
| Priority date | — |
| Expiry date | May 14, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/24
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A metastable arbiter circuit for determining the state of a monitored flip-flop contains an additional flip-flop that is provided on the same semiconductor chip as the operating flip-flop, the metastable condition of which is to be monitored. This additional flip-flop is hardwired in the SET state, so that its high and low outputs can be referenced to indicate when a defined state condition has been achieved in the operating flip-flop. The Q and Q outputs of the second flip-flop from which a pair of reference voltages are derived are applied to a pair of comparators, one comparator being used for negative referencing, the other for positive referencing. Through this circuit combination, there is achieved both level detection and hysteresis to produce a high true output when the complementary outputs of the operating flip-flop have reached a defined stable state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.