FM data demodulator including circuit for eliminating step distortion
US4286224A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 12, 1979 |
| Grant date | Aug 25, 1981 |
| Priority date | — |
| Expiry date | Dec 12, 1999 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/1563
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement is disclosed for the correction of step distortions in a transmission of data employing frequency-modulated data signals. The circuit arrangement contains a demodulator which compares time durations between edges of the frequency-modulated data signals with a measuring time duration generated in a timing element and generates demodulated data signals after an integration. The demodulated data signals are compared in a comparator to reference signals and the signals at the output of the comparator are integrated in an integration element. The integration element emits control signals to the timing element. With these control signals the measuring time duration is changed in such manner that the step distortions of the demodulated data signals are opposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.