Process for patterning metal connections on a semiconductor structure by using an aluminum oxide etch resistant layer
US4289574A · kind A · utility
16Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1980 |
| Grant date | Sep 15, 1981 |
| Priority date | — |
| Expiry date | Jun 9, 2000 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for patterning plasma etchable regions on a semiconductor structure includes the steps of forming a layer of an oxide of aluminum over the surface of the semiconductor structure, forming an overlying layer of plasma etchable material on the layer of oxide, and removing undesired portions of the overlying layer by plasma etching to thereby expose portions of the layer of oxide. In some embodiments of the invention the thereby exposed portions of the layer of oxide are then removed, together with any underlying portions of the first layer, by isotropic etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.