Data processing apparatus having op-code extension register
US4293907A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1978 |
| Grant date | Oct 6, 1981 |
| Priority date | — |
| Expiry date | Dec 29, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30189
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Central Processing Unit (CPU) includes a hardware op-code extending register (OER) for storing a code for programmable selection of optional CPU features which modify processor operations defined by the op-code in each instruction. A control section in the CPU decodes both the op-code of a current instruction and the code in the OER, effectively combining the two to form an extended op-code capable of defining a larger set of processor operations than the op-code carried in each instruction. The code in the OER is changed only when the CPU executes an instruction for transferring a new code into OER. Thus the code in OER can remain stationary over many instruction cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.